Julia Targeting Xilinx Vitis HLS

How difficult is it to get Julia to target Xilinx’s API for Julia algorithms direct to FPGA?

https://forums.xilinx.com/t5/AI-and-Machine-Learning-Blog/Opening-a-World-of-Possibilities-Vitis-HLS-Front-end-is-Now-Open/ba-p/1211207

Is this what we’ve all been waiting for?

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yes, I’m really interest to develop Julia code link with core library of Xilinx like python. its simply Fastest language in Fastest hardware. but my understanding in KRIA modules, the front end coding like Python or C++ code directly convert to Machine code , then its run in KRIA,. Anyway its good alternative to Jetson Nano

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