Hello
I would appreciate to see (vector) NAND (aka ⊼) and NOR (aka ⊽) bitwise operators implemented because these functions are commonly hardwired nowadays. We can see them in the Arm A64 Instruction Set Architecture and Power ISA Instruction Set for instance. The X86 times are over.
May I suggest to add these two functions to the specs ?
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You don’t necessarily need intrinsics for nand and nor to take advantage of these instructions. I don’t own a computer with one of these architectures but what you can do is ask Julia for the LLVM IR of a nand
function we just define ourselves:
julia> nand(x, y) = ~(x & y)
nand (generic function with 1 method)
julia> code_llvm(nand, NTuple{2, UInt})
; @ REPL[8]:1 within `nand'
define i64 @julia_nand_445(i64 zeroext %0, i64 zeroext %1) {
top:
; ┌ @ int.jl:311 within `&'
%2 = and i64 %1, %0
; └
; ┌ @ int.jl:287 within `~'
%3 = xor i64 %2, -1
; └
ret i64 %3
}
If we tell llvm to compile this for PPC, we can see that it will just emit a single nand
instruction (see Compiler Explorer):
julia_nand_445: # @julia_nand_445
.quad .Lfunc_begin0
.quad .TOC.@tocbase
.quad 0
.Lfunc_begin0:
nand 3, 4, 3
blr
.long 0
.quad 0
That said, it probably wouldn’t be unreasonable to add a nand
and nor
function like this to base.
21 Likes
very interesting ! Thanks !
1 Like
Seems like a reasonable issue to open. The standard infix operator versions could be defined by default as well.
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