I think this is an LLVM limitation:
https://llvm.org/docs/LangRef.html#shufflevector-instruction
It could probably be worked around, at the cost of no longer being architecture agnostic.
I think this is an LLVM limitation:
https://llvm.org/docs/LangRef.html#shufflevector-instruction
It could probably be worked around, at the cost of no longer being architecture agnostic.