# \#fpga-xilinx

**URL:** https://discourse.julialang.org/tag/fpga-xilinx/719.md

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## [Julia Targeting Xilinx Vitis HLS](https://discourse.julialang.org/t/julia-targeting-xilinx-vitis-hls/63113)

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**Author:** [@Allan\_Baker](https://discourse.julialang.org/u/Allan_Baker)\
**Replies:** 4\
**Last updated:** [March 11, 2025, 1:21pm UTC](https://discourse.julialang.org/t/julia-targeting-xilinx-vitis-hls/63113 "2025-03-11T13:21:43Z")

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How difficult is it to get Julia to target Xilinx’s API for Julia algorithms direct to FPGA? https://forums.xilinx.com/t5/AI-and-Machine-Learning-Blog/Opening-a-World-of-Possibilities-Vitis-HLS-Front-end-is-Now-Open/ba-…