# I have problem with sampling Frequency when I use ACME.jl

**URL:** <https://discourse.julialang.org/t/i-have-problem-with-sampling-frequency-when-i-use-acme-jl/62082>\
**Category:** Modelling & Simulations\
**Tags:** question, package, plotting\
**Created:** [May 30, 2021, 11:28am UTC](https://discourse.julialang.org/t/i-have-problem-with-sampling-frequency-when-i-use-acme-jl/62082 "2021-05-30T11:28:49Z")\
**Posts on this page:** 8\
**Page:** 1

<div class="post-metadata">

**Author:** ![sajad\_ghassemi](https://sea2.discourse-cdn.com/julialang/user_avatar/discourse.julialang.org/sajad_ghassemi/32/25241_2.png) [@sajad\_ghassemi](https://discourse.julialang.org/u/sajad_ghassemi)\
**Post date:** [May 30, 2021, 11:28am UTC](https://discourse.julialang.org/t/i-have-problem-with-sampling-frequency-when-i-use-acme-jl/62082/1 "2021-05-30T11:28:49Z")

</div>

Dear friends,  
I am simulating a simple electrical circuit in EMTP-RV software which is used in electrical engineering as follows:  
 ![fig1](https://global.discourse-cdn.com/julialang/original/3X/b/a/ba2718d94f4c598ed77a328f7d909e68cee21b71.png)  
and the voltage waveform of resistor is as follows:

 ![fig1](https://global.discourse-cdn.com/julialang/original/3X/3/7/371b65a5d68183b3b320bcf53409d97b937bd81c.png)

now I just used ACME.jl package to simulate it in Julia and I wrote the code as follows:  
using ACME  
circ = @circuit begin  
j\_in = voltagesource()  
d1 = diode(;is=1e-12, η = 1)  
r=resistor(10)  
j\_out = voltageprobe()  
j\_in[+] ⟷ d1[+]  
j\_in[-] ⟷ gnd  
d1[-] ⟷ r[1]  
gnd ⟷ r[2]  
r[1] ⟷ j\_out[+]  
r[2] ⟷ j\_out[-]  
end  
fs = 44100;  
fsig = 100000;  
Tsim = 1 ;

Tsim = round(Int, Tsim);  
Nsamples = round(Int, Tsim_fs) - 1  
t = (0:Nsamples)'/fs  
model = DiscreteModel(circ, 1/fs)  
y = run!(model, 310_sin.(2π_fsig ._ t))  
using Plots  
plotly()  
Plots.PlotlyBackend()  
plot(t’, y’)  
and the figure is as follows:  
 ![fig1](https://global.discourse-cdn.com/julialang/original/3X/3/6/364b89765b444ecb9b94987525771e7b28de5133.png)  
so my qustion is why the figures are not matched. what should I do?

---

<div class="post-metadata">

**Author:** ![Iulian.Cioarca](https://sea2.discourse-cdn.com/julialang/user_avatar/discourse.julialang.org/iulian.cioarca/32/30166_2.png) [@Iulian.Cioarca](https://discourse.julialang.org/u/Iulian.Cioarca)\
**Post date:** [May 30, 2021, 12:03pm UTC](https://discourse.julialang.org/t/i-have-problem-with-sampling-frequency-when-i-use-acme-jl/62082/2 "2021-05-30T12:03:10Z")

</div>

Aren’t you undersampling your signal?fs is 44100 and fsig is 100k.

---

<div class="post-metadata">

**Author:** ![sajad\_ghassemi](https://sea2.discourse-cdn.com/julialang/user_avatar/discourse.julialang.org/sajad_ghassemi/32/25241_2.png) [@sajad\_ghassemi](https://discourse.julialang.org/u/sajad_ghassemi)\
**Post date:** [May 30, 2021, 12:15pm UTC](https://discourse.julialang.org/t/i-have-problem-with-sampling-frequency-when-i-use-acme-jl/62082/3 "2021-05-30T12:15:43Z")

</div>

LOL. I am just laughing for my silly mistake 🙂  
Thanks dear.  
fs = 441000;  
fsig = 1000;

---

<div class="post-metadata">

**Author:** ![sajad\_ghassemi](https://sea2.discourse-cdn.com/julialang/user_avatar/discourse.julialang.org/sajad_ghassemi/32/25241_2.png) [@sajad\_ghassemi](https://discourse.julialang.org/u/sajad_ghassemi)\
**Post date:** [May 30, 2021, 2:33pm UTC](https://discourse.julialang.org/t/i-have-problem-with-sampling-frequency-when-i-use-acme-jl/62082/4 "2021-05-30T14:33:38Z")

</div>

dear friend. I changed the circuit a bit and made it complicated why this figure of current passing through D1 doesn’t match  
 ![error2](https://global.discourse-cdn.com/julialang/original/3X/1/4/1415a2e894a59c98ebec1ede2f814dbfbd79bc5e.png)

 ![error](https://global.discourse-cdn.com/julialang/original/3X/1/f/1f79690c3703e8de6033342e6f2b0055088e6a09.png)  
my code using ACME.jl package in julia as follows :  
using ACME  
circ = @circuit begin  
j\_in = voltagesource()  
l1=inductor(0.001)  
d1 = diode(;is=1e-12, η = 1)  
d2 = diode(;is=1e-12, η = 1)  
d3 = diode(;is=1e-12, η = 1)  
d4 = diode(;is=1e-12, η = 1)  
c1 = capacitor(1e-3)  
r1 = resistor(20)  
i\_out = currentprobe()  
j\_in[+] ⟷ l1[1]  
j\_in[-] ⟷ gnd  
l1[2] ⟷ d1[+] ⟷ d4[-] ⟷ i\_out[-]  
gnd ⟷ d2[+] ⟷ d3[-]  
d1[-] ⟷ d2[-] ⟷ r1[1] ⟷ c1[1] ⟷ i\_out[+]  
d4[+] ⟷ d3[+] ⟷ r1[2] ⟷ c1[2]  
end  
fs = 44100;  
fsig = 1000;  
Tsim = 1 ;

Tsim = round(Int, Tsim);  
Nsamples = round(Int, Tsim_fs) - 1  
t = (0:Nsamples)'/fs  
model = DiscreteModel(circ, 1/fs)  
y = run!(model, 310_sin.(2π_fsig ._ t))  
using Plots  
plotly()  
Plots.PlotlyBackend()  
plot(t’, y’)  
and the figure is as follows :  
 ![error2](https://global.discourse-cdn.com/julialang/original/3X/3/9/395cc1efd16ce18151818c69073af104cbcc1ab5.png)

although the diodes paramters are approximately matched with simulation, what should I do to match the waveforms of current with simulation result. Is there a problem with freuqncy of sinus in my code or the package can’t solve the circuit???

---

<div class="post-metadata">

**Author:** ![Iulian.Cioarca](https://sea2.discourse-cdn.com/julialang/user_avatar/discourse.julialang.org/iulian.cioarca/32/30166_2.png) [@Iulian.Cioarca](https://discourse.julialang.org/u/Iulian.Cioarca)\
**Post date:** [May 30, 2021, 6:43pm UTC](https://discourse.julialang.org/t/i-have-problem-with-sampling-frequency-when-i-use-acme-jl/62082/5 "2021-05-30T18:43:23Z")

</div>

It’s best to format your code example using `back quotes `. See: [Please read: make it easier to help you](https://discourse.julialang.org/t/psa-make-it-easier-to-help-you/14757)

I never actually used this package (never knew it existed, but it’s really cool!) but I don’t think you placed the current probe correctly in order to measure D1 current. I tried this configuration, with the current probe between D1- and D2-:

```julia
using ACME
using Plots
plotly()
Plots.PlotlyBackend()

circ = @circuit begin
    j_in = voltagesource()
    l1 = inductor(1e-3)
    d1 = diode(;is=1e-12, η = 1)
    d2 = diode(;is=1e-12, η = 1)
    d3 = diode(;is=1e-12, η = 1)
    d4 = diode(;is=1e-12, η = 1)
    c1 = capacitor(1e-3)
    r1 = resistor(20)
    i_out = currentprobe()

    j_in[+] ⟷ l1[1]
    j_in[-] ⟷ gnd
    l1[2] ⟷ d1[+] ⟷ d4[-]
    gnd ⟷ d2[+] ⟷ d3[-]
    d1[-] ⟷ i_out[+]
    i_out[-] ⟷ d2[-] ⟷ r1[1] ⟷ c1[1]
    d4[+] ⟷ d3[+] ⟷ r1[2] ⟷ c1[2]
end

fs = 44100;
fsig = 1000;
dt = 1/fs
t = 0:dt:1
model = DiscreteModel(circ, 1/fs)
y = run!(model, 10*sin.(2*π*fsig .* t'))

plot(t, y')

```

If you mess around with the frequencies or components, your simulation will not converge. I’m not sure why, but it converges if I lower the sine amplitude.

Is this a homework?

Also, please avoid double posting. It only clutters the discourse dashboard and makes responses harder to track.

---

<div class="post-metadata">

**Author:** ![sajad\_ghassemi](https://sea2.discourse-cdn.com/julialang/user_avatar/discourse.julialang.org/sajad_ghassemi/32/25241_2.png) [@sajad\_ghassemi](https://discourse.julialang.org/u/sajad_ghassemi)\
**Post date:** [May 30, 2021, 7:49pm UTC](https://discourse.julialang.org/t/i-have-problem-with-sampling-frequency-when-i-use-acme-jl/62082/6 "2021-05-30T19:49:08Z")

</div>

> [@Iulian.Cioarca](#):
>
> ```julia
> using ACME
> using Plots
> plotly()
> Plots.PlotlyBackend()
> 
> circ = @circuit begin
> j_in = voltagesource()
> l1 = inductor(1e-3)
> d1 = diode(;is=1e-12, η = 1)
> d2 = diode(;is=1e-12, η = 1)
> d3 = diode(;is=1e-12, η = 1)
> d4 = diode(;is=1e-12, η = 1)
> c1 = capacitor(1e-3)
> r1 = resistor(20)
> i_out = currentprobe()
> 
> j_in[+] ⟷ l1[1]
> j_in[-] ⟷ gnd
> l1[2] ⟷ d1[+] ⟷ d4[-]
> gnd ⟷ d2[+] ⟷ d3[-]
> d1[-] ⟷ i_out[+]
> i_out[-] ⟷ d2[-] ⟷ r1[1] ⟷ c1[1]
> d4[+] ⟷ d3[+] ⟷ r1[2] ⟷ c1[2]
> end
> 
> fs = 44100;
> fsig = 1000;
> dt = 1/fs
> t = 0:dt:1
> model = DiscreteModel(circ, 1/fs)
> y = run!(model, 10*sin.(2*π*fsig .* t'))
> 
> plot(t, y')
> 
> ```

Thanks for the answer and I am very sorry if I disturb you as I asked new question here.  
I wish it was my homework. but, my homework is simulation the circuit without using packages. Actually, I have to model diode as a switch connected to a DC Voltage and a resistor and extracting a admitance matrix which can be 21\*21 to simulate it and using backward or forward Euler to find the answer.

---

<div class="post-metadata">

**Author:** ![Iulian.Cioarca](https://sea2.discourse-cdn.com/julialang/user_avatar/discourse.julialang.org/iulian.cioarca/32/30166_2.png) [@Iulian.Cioarca](https://discourse.julialang.org/u/Iulian.Cioarca)\
**Post date:** [May 30, 2021, 8:11pm UTC](https://discourse.julialang.org/t/i-have-problem-with-sampling-frequency-when-i-use-acme-jl/62082/7 "2021-05-30T20:11:39Z")

</div>

No worries! Good luck with the homework!

---

<div class="post-metadata">

**Author:** ![sajad\_ghassemi](https://sea2.discourse-cdn.com/julialang/user_avatar/discourse.julialang.org/sajad_ghassemi/32/25241_2.png) [@sajad\_ghassemi](https://discourse.julialang.org/u/sajad_ghassemi)\
**Post date:** [May 30, 2021, 8:12pm UTC](https://discourse.julialang.org/t/i-have-problem-with-sampling-frequency-when-i-use-acme-jl/62082/8 "2021-05-30T20:12:04Z")

</div>

> [@Iulian.Cioarca](#):
>
> ```julia
> j_in[+] ⟷ l1[1]
> j_in[-] ⟷ gnd
> l1[2] ⟷ d1[+] ⟷ d4[-]
> gnd ⟷ d2[+] ⟷ d3[-]
> d1[-] ⟷ i_out[+]
> i_out[-] ⟷ d2[-] ⟷ r1[1] ⟷ c1[1]
> d4[+] ⟷ d3[+] ⟷ r1[2] ⟷ c1[2]
> 
> ```

Thanks:)
