There is, even if you code in assembly.
Something like
loadmem reg0, memref
where reg0 is a register and memref is a memory address, and loadmem moves 8 bytes from that address into the register, is not necessarily atomic on all architectures. It might be done with two loads in the microcode, and if run in parallel with a similar storemem, you may end up with incomplete data. It can e.g. be atomic if the 8 bytes are in a single cache line, and non-atomic if they cross a cache line boundary. Some architectures fault on such unaligned access, some give a warning, some do it non-atomically.
Anyway, julia developers leave such details to llvm, though I think this is atomic by chance on all architectures julia runs on.